1. Field of the Invention
The present invention relates to plasma display panels which are employed as an image display device for use with information terminal devices, personal computers, televisions or the like. More particularly, the present invention relates to a plasma display panel and its fabrication method which make it possible to provide a higher peak intensity and less maximum power consumption for a plasma display panel, having a large capacity and a high resolution, than prior-art panels and methods.
2. Description of the Related Art
Plasma display panels have such advantages that they have a simple construction, facilitates the provision of a large screen, and can employ inexpensive glass materials, which are widely used for glass windows or the like, as substrates for constituting the display panel.
A plasma display panel employs two transparent insulating substrates formed of such a glass material, each transparent insulating substrate having electrodes and ribs formed thereon to define pixel cells or display units. To complete the panel, these two transparent insulating substrates, having these structures formed thereon, are disposed in parallel spaced relation to define a gap therebetween in which a discharge gas is sealed. Typically, the rib is about 0.1 mm in height and the transparent insulating substrate is about 3 mm in thickness, thereby making it possible to provide extremely thin and lightweight display devices.
Accordingly, by making use of such features, the plasma display panel has been being used in a display device for personal computers or office work stations, which have found widespread use in recent years, or for large-screen wall-hung televisions which have strong potential for further development.
The plasma display panel is largely classified into DC and AC types depending on the difference in panel structures. The plasma display panel with the electrodes being directly exposed to a discharge gas is referred to as the DC type because a DC current continues to flow once a discharge has occurred. On the other hand, the AC type with an insulating layer being interposed in between the electrodes and the discharge gas allows a pulse current to flow for a short period of time about 1 μs after the application of a voltage and then converge. The flow of current is restricted by the electrostatic capacitance of the insulating layer. The insulating layer acts as a capacitor so that applied AC pulses cause repetitive pulses of light emission to occur for display purposes. This is why the AC type is called by that name.
Although the DC type has a simple structure, the electrodes are directly exposed to discharge environments and therefore wear out in a shorter period of time, thereby making it difficult to provide the DC type with long life. In contrast, the AC type requires additional time, effort, and cost to form the insulating layer, however, the electrodes are covered with the insulating layer, thereby providing the AC type with long life. In addition, the AC type can readily implement the function referred to as a memory function, which enables highly bright light emission, and accordingly has been developed in recent years.
The present invention relates to this AC memory-type plasma display panel. Now, the configuration and then the method of the AC memory-type plasma display panel will be explained below.
First, the configuration of the AC memory-type plasma display panel is described. FIGS. 1 to 3 are views illustrating an AC memory-type plasma display panel disclosed in Japanese Patent Laid-Open Publication No. Hei 6-12026 and having an electrode structure which is generally called a plane discharge type. FIG. 1 is a plan view, FIG. 2 is a cross-sectional view taken along line T-T of FIG. 1, and FIG. 3 is a cross-sectional view taken along line U-U of FIG. 1.
As shown in FIG. 2, this plasma display panel has first and second insulating substrates 11 and 12 which are transparent, 3 mm in thickness, formed of soda glass, and disposed in parallel spaced relation to each other to allow light emission to pass therethrough for display purposes. In between the first insulating substrate 11 and the second insulating substrate 12, provided as basic constituents are the structures for the plasma display panel and sealed is a discharge gas.
On the surface of the first insulating substrate 11 opposite to the second insulating substrate 12, a plurality of sustain electrodes 13a formed of transparent NESA film and a plurality of scan electrodes 13b also formed of transparent NESA film are disposed alternately in parallel to each other. In addition, a bus electrode 13c formed of silver thick film is disposed on top of each sustain electrode 13a and each scan electrode 13b to be in contact therewith, thereby making it possible to supply sufficient current to the sustain electrode 13a and the scan electrode 13b. These sustain electrode 13a, the scan electrode 13b, and the bus electrode 13c are formed to extend in the direction of horizontal rows in FIG. 1. Furthermore, these sustain electrode 13a, the scan electrode 13b, and the bus electrode 13c, are covered with an insulating layer 18a formed of thick transparent glaze film, and on top of the insulating layer 18a, a protective layer 19 of MgO having a thickness of 1 μm for protecting the insulating layer 18a from discharges is formed.
Incidentally, the sustain electrode 13a and the scan electrode 13b are generally referred to as a display electrode portion which plays a major role in emitting light for display purposes. In addition, the bus electrode 13c is to supply current to the display electrode portion. Likewise, the wiring portion for supplying current is often referred to as the bus electrode. In this context, the bus electrode 13c is sometimes referred to as the bus electrode portion.
The electrode portion composed of the display electrode portion and the bus electrode portion is formed on the same surface of the glass substrate to provide an electrode constituting portion for causing plane discharges, and thus the display electrode portion and the bus electrode portion are generally referred to as the plane discharge electrode. For example, the plane discharge electrode on the side of the sustain electrode has the sustain electrode 13a as the display electrode portion and the bus electrode 13c on the sustain electrode 13a as the bus electrode.
Now, on the second insulating substrate 12, there are formed a plurality of column electrodes 14 of thick silver film to extend in the direction of horizontal rows in FIG. 1. The column electrode 14 and the second insulating substrate 12 are covered with a thick insulating layer 18b. In between the insulating layer 18b and the insulating layer 18a, ribs 16 of thick film are formed to provide spaces for the discharge gas and define pixel cells 20. Furthermore, a discharge gas is sealed in the discharge gas spaces 15 defined by the rib 16, and on the insulating layer 18b in each discharge gas space 15, there is provided a phosphor 17 made of Zn2SiO4:Mn for converting UV light produced by discharges in the discharge gas into visible light.
As described above, the two insulating substrates 11 and 12, each having respective structures formed thereon, are disposed in parallel spaced relation to each other to define a gap therebetween which acts as the discharge gas space 15. The discharge gas space 15 is filled, at a total pressure of 66.5 kPa, with a discharge gas of a gas mixture such as He and Ne mixed at a ratio of seven to three and added by 3% of Xe.
Referring to FIG. 1, the ribs 16 extending horizontally and vertically (in the directions of rows and columns) define discharge cells, which in turn act as pixel cells 20. In FIG. 4, a pixel cell is denoted by aij at the point of an intersection of a scan electrode Si (i=1, 2, . . . , m) and a column electrode Dj (j=1, 2, . . . , n). The phosphor 17 of FIG. 2 can be provided with three colors of red, green, and blue at each pixel cell, thereby providing a plasma display panel which enables full-color display. The display of this plasma display panel can be viewed from either side, that is, in the direction going upwards from the first insulating substrate 11 of FIG. 2 (in the direction of the upper surface) or in the direction going downwards from the second insulating substrate 12 (in the direction of the lower surface). For the plasma display panel shown in FIGS. 1 to 3, it is preferable to view the display panel in the direction of the upper surface, which allows the light emitting portion at the phosphor 17 to be directly viewed and thereby provide higher intensity.
Incidentally, the insulating substrate on the side for viewing the display (the first insulating substrate 11 in this case) may be called the front substrate, while the other insulating substrate (the second insulating substrate 12 in this case) may be called the rear substrate. In addition, in FIG. 1, the longitudinal direction of the bus electrode 13c is simply referred to as the row direction, while the longitudinal direction of the column electrode 14 is referred to as the column direction. Furthermore, since the plasma display panel often employs the column direction as the vertical direction, the column direction is assumed to be the vertical direction and the row direction as the horizontal direction for explanatory purposes. However, this is assumed merely for convenience and thus the column direction may be employed as the horizontal direction in practical uses.
FIG. 4 is a plan view illustrating only the arrangement of electrodes of the plasma display panel. Referring to FIG. 4, reference numeral 10 designates a plasma display panel; 21 designates a seal portion where the first insulating substrate 11 and the second insulating substrate 12 are disposed in parallel spaced relation to each other to define a gap therebetween in which a discharge gas is hermetically sealed; C1, C2, . . . , Cm designate the sustain electrodes 13a; S1, S2, . . . , Sm designate the scan electrodes 13b; and D1, D2, . . . , Dn−1, Dn designate the column electrodes 14. For example, a VGA-type actual plasma display panel has 480 pixel display units in the vertical direction and 640 pixel display units in the horizontal direction, where one pixel display unit consists of three pixel cells of R, G, and B. The VGA-type panel has 480 scan electrodes 13b (S1, S2, . . . , Sm) corresponding to the 480 pixel display units in the vertical direction, 480 sustain electrodes 13a (C1, C2, . . . , Cm), and 1920 (=640×3) column electrodes 14 (D1, D2, . . . , Dn−1, Dn), which result from the 640 pixel display units, each being divided into three colors in the horizontal direction. Each pixel cell pitch is 0.35 mm between the column electrodes 14 and 1.05 mm between the scan electrodes 13b. The distance between the scan electrode 13b and the sustain electrode 13a, disposed parallel to each other, is 0.14 mm.
Now, described below is a method for performing gray-scale display operation using the plasma display panel configured as described above. For the plasma display panel, unlike other types of display devices, it is difficult to change the level of applied voltages to thereby perform gray-scale display operation at a high intensity, and accordingly the number of times of light emission is controlled in general to perform gray-scale display operation. Particularly, to perform gray-scale display operation at a high intensity, employed is the sub-field method to be described below.
FIG. 5 is an explanatory view illustrating the drive sequence in accordance with the sub-field method. In FIG. 5, the horizontal axis represents the time and the vertical axis represents the scan electrode. A screenful of image is sent during the duration of one field. The duration of one field is often set to within the range of about 1/50 to 1/75 seconds depending on the computer or the broadcasting system.
As shown in FIG. 5, for gray-scale image display operation in the plasma display panel, one field is divided into k sub-fields (k=6 sub-fields, or SF1 to SF6, in the case of FIG. 5). As will be described referring to FIG. 6, each sub-field is made up of a write cycle for writing display data with a preliminary discharge pulse 36, a preliminary discharge erase pulse 37, a scan pulse 33, a data pulse 34 or the like, and a sustain cycle for sustaining light emission for display purposes. Incidentally, in the write cycle, the preliminary discharge pulse and the preliminary discharge erase pulse may be omitted.
The luminous intensity of each pixel cell is controlled in accordance with the following equation 1 by assigning a weight of 2n to the number of times of light emission for sustain discharge at each pixel cell in each sub-field.
                    Intensity        =                  L          ⁢                                          ⁢          1          ×                                    ∑                              n                =                1                            k                        ⁢                                          2                                  (                                      n                    -                    1                                    )                                            ×                              a                n                                                                        (                  Equation          ⁢                                          ⁢          1                )            
where n is the sub-field number, being one (1) for the sub-field of the lowest intensity and k for the sub-field of the highest intensity; L1 is the intensity of the sub-field providing the lowest intensity; and an is a variable taking on a value of one or zero, being a value of one when the pixel cell emits light in the nth sub-field while zero when no light is emitted therefrom. Since different levels of luminous intensity are provided at each of the sub-fields, brightness can be controlled by selecting the “on” or “off” state of each sub-field.
Since FIG. 5 shows the case of k=6, by color display operation with the red, green, and blue color pixel cells being grouped in one set, 64 (2k=26) levels of gray scale can be expressed with the colors. It is possible to display 643=262,144 colors (including black). For k=1 or one field=one sub-field, the colors allow two levels (“on” or “off”) of gray scale to be displayed. This allows 23=8 colors (including black) to be displayed.
FIG. 6 is a view illustrating an example of drive voltage waveforms and a light emission waveform in the plasma display panel shown in FIGS. 1 to 4. A waveform (A) represents a voltage waveform to be applied to the sustain electrodes 13a (C1, C2, . . . , Cm); a waveform (B) represents a voltage waveform to be applied to the scan electrode 13b (S1); a waveform (C) represents a voltage waveform to be applied to the scan electrode 13b (S2); a waveform (D) represents a voltage waveform to be applied to the scan electrode 13b (Sm); a waveform (E) represents a voltage waveform to be applied to the column electrode 14 (D1); a waveform (F) represents a voltage waveform to be applied to the column electrode 14 (D2); and a waveform (G) represents a light emission waveform of the pixel cell 20 (all). The pulses having a diagonal line in the waveforms (E) and (F) indicate that the presence or absence of the pulses is determined in accordance with the presence or absence of data to be written. FIG. 6 shows the data voltage waveforms employed when data is written to the pixel cell 20 (a11, a22). The figure also shows that display operation is performed at the pixel cells in the third and subsequent rows depending on the presence or absence of data.
A sustain pulse 31 and a preliminary discharge pulse 36 are applied to the sustain electrodes 13a (C1, C2, . . . , Cm). On the other hand, a sustain pulse 32, an erase pulse 35, and the preliminary discharge erase pulse 37 are applied successively in common to the scan electrodes 13b (S1, S2, . . . , Sm) in addition to the scan pulse 33 which is applied to each of the scan electrodes 13b (S1, S2, . . . , Sm) with independent timing. When light emission data is available, the data pulse 34 is applied to each of the column electrodes Dj (j=1, 2, . . . , n) in phase with the scan pulse 33. In the plasma display panel configured as shown in FIGS. 1 to 4, the erase pulse 35 first erases the discharge in the pixel cell that has emitted light in the immediately previous sub-field. Then, the preliminary discharge pulse 36 causes a preliminary discharge to forcedly occur once in all pixel cells and then the preliminary discharge erase pulse 37 is allowed to erase the preliminary discharge. This allows the scan pulse 33 being subsequently applied to readily cause a write discharge.
After the preliminary discharge has been erased, application of the scan pulse 33 and the data pulse 34 to the scan electrode 13b and the column electrode 14 with the same timing to cause a write discharge will cause a discharge between the scan electrode and the column electrode at the same time for the write discharge. This is referred to as the write sustain discharge. Subsequently, the sustain discharge is maintained between the sustain electrode 13a and scan electrode 13b, adjacent to each other, by the sustain pulses 31 and 32. On the other hand, application of only the scan pulse 33 or only the data pulse 34 would cause neither a write discharge nor a subsequent sustain discharge to occur. Such a function is called the memory function. The luminous intensity is controlled at each of the sub-fields depending on the number of times of sustain discharge.
However, as can be seen from the cross-sectional view of FIG. 3, there is a drawback, in outputting the light emitted from the phosphor 17 upwards in FIG. 55, that the bus electrode 13c present above the phosphor 17 provides an insufficient optical output efficiency. Accordingly, there is a problem that this provides a low ratio of luminous intensity to the power input for light emission (hereinafter referred to as the luminous efficiency), resulting in an increased power consumption of a display device employing the plasma display panel.